top left Image    Processor Status Register (PS)

The status register is a collection of bits that record various aspects of the results of previous calculations. Whilst PS is internally a 16 bit register only 8 bit are visible to the user, the other hidden 8 bits are used during complex operations such as multiplication etc. and do not convey any information from one instruction to the next. The status bits are:
Bit Symbol Description
0 I Enable interrupts. Set/cleared by user. Also cleared on servicing an interrupt/exception.
1 N Set/cleared when result is negative/positive
2 Z Set/cleared when result is zero/non-zero
3 V Set/cleared when there was/was not an overflow
4 X Set/cleared when there was a carry (not cleared on non-arithmetic operations so can be used for extended arithmetic)
5 C Set/cleared when there was a carry
6 D Controls division mode
7 U User bit. May be used for conditional branches, the BUS and BUC instructions are provided for this. Does not otherwise affect, and is not affected by processor operation but must be set/cleared explicitly by user.
8 F0 Sign of R0 at start. Used for signed multiplication and division.
9 F1 Sign of R1 at start. Used for signed multiplication and division.
10 F2 Set to indicate processing of RESET
11 F3 Set during end of shift part of multiplication iteration.
12 F4 Set to indicate division by zero.
13 F5 Set to indicate exception processing.
14 F6 Set to modify an operation. In particular to make SHIFT calculate WEIGHT.
15 - not used

The module looking after the status register includes an 8 bit logic unit to implement the AND/OR PS,#data instructions which are used to clear/set the user accessible status bits.
 If the instruction executing is not an AND/OR PS instruction then the next flag values are calculated on the basis of results generated by the ALU.

© 2014-2016 James Newman.